Fundamentals of Digital Logic with Verilog Design

Use of CAD software is well integrated into the book. The CAD software provides automatic mapping of a design written in Verilog into Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Devices (CPLDs). Students will be able to try, firsthand, the book’s Verilog examples (over 140) and homework problems.

Engineers use Quartus CAD for designing, simulating, testing and implementing logic circuits. The version included with this text supports all major features of the commercial product and comes with a compiler for the IEEE standard Verilog language. Students will be able to:

enter a design into the CAD system

compile the design into a selected device

simulate the functionality and timing of the resulting circuit

implement the designs in actual devices (using the school’s laboratory facilities)

Verilog is a complex language, so it is introduced gradually in the book. Each Verilog feature is presented as it becomes pertinent for the circuits being discussed. To teach the student to use the Quartus CAD, the book includes three tutorials.